“A Novel Damage-Free High-k Etch Technique Using Neutral Beam Assisted Atomic Layer Etching (NBALE) for sub-32nm Technology Node Low Power Metal Gate/High-K Dielectric CMOSFETs”, Proc. of Int. Elect. Dev. Meeting, 2009

Download

“Plasma induced damage of aggressively scaled gate dielectric (EOT < 1.0 nm) in metal gate/high-k dielectric CMOSFETs,” Proc. of IRPS, 2008.

Download

“Effect of Si cap layer on interface quality and NBTI in Ge-on-si with HfSiO for High Mobility Channel pMOSFETs,” Proc. of 4th Int. Symp. on Adv. Gate Stack Tech., 2007.

“Improvement of metal gate/high-k dielectric CMOSFETs characteristics by neutral beam etching of metal gate,” Solid State Electronics, 86, p.75-78, (2013).

Download

“Effect of Si capping layer on the interface quality and NBTI of high mobility channel Ge-on-Si pMOSFETs,“ Microelectronics Eng. 86(3), p.259, Mar. 2009.

Download

“Effects of in situ O2 plasma treatment on off-state leakage and reliability in metal-gate/high-k dielectric MOSFETs,” IEEE Electron. Dev. Lett., 29, p.565, Jun. 2008.

Download