“Issues associated with p-type band-edge effective work function metal electrodes: Fermi-level pinning and flatband roll-off,” Proc. of VLSI-TSA, 2007

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“Impact of the bottom interfacial layer on the threshold voltage and device reliability of fluorine incorporated PMOSFET with high-k/metal electrode,”, Proc. of IRPS, p.374, 2007.

“A novel electrode induced strain engineering for High performance SOI finFET utilizing Si(110) channel for both nMOS and pMOS,” Tech. Dig. of IEDM, 2006.

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