“Tunnel Oxide Dipole Engineering in TANOS Flash Memory for Fast Programming with Good Retention and Endurance,” Proc. of VLSI-TSA, 2008.

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“Band-Engineered Low PMOS VT with High-K/Metal Gates Featured in a Dual Channel CMOS Integration Scheme,” Proc. of Symp. on VLSI Tech., p.154, 2007

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