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exel
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exel2014-09-02 16:51:002014-09-02 16:51:04"Dipole Model Explaining High-k/Metal Gate Threshold Voltage Tuning",Electrochem. Soc. Transaction, 19(1), p.269, 2009. (Invited)
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exel
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exel2014-09-02 16:49:052014-09-02 16:49:08"Device and Reliability Improvement of HfSiON+LaOx/Metal Gate Stacks for 22nm Node Application", Proc. of Int. Electron Device Meeting, p.45, 2008.
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exel
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exel2014-09-02 16:47:232014-09-02 16:47:26“The Impact of La-Doping on the Reliability of Low Vth High-k/Metal Gate nMOSFETs Under Various Gate Stress Conditions", Proc. of Int. Electron Device Meeting, p.115, 2008.
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exel
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exel2014-09-02 16:46:422014-09-02 16:46:45“Breakdown in the metal/high-k gate stack: Identifying the “weak link" in the multilayer dielectric,” Proc. of Int. Electron Device Meeting, p.791, 2008.
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exel
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exel2014-09-02 16:45:592014-09-02 16:46:02 “Gate stack technology for nano-scale CMOS devices,”, Int. MRS, Chongging, China, 2008. (Invited)
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exel
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exel2014-09-02 16:45:352014-09-02 16:45:38“Gate stack technology for nano-scale CMOS devices,”, IWDTF, Tokyo. Japan, 2008. (Invited)