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exel
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exel2014-09-02 17:22:432014-09-02 17:22:46” Comprehensive Study for RF Interference Limited 3D TSV Optimization”, Proc. of VLSI-TSA , April, 2013
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exel
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exel2014-09-02 17:22:022014-09-02 17:22:05 “Sub-10nm1T-1R Cell Design using HfOx based ReRAM Cell”, Proc. of VLSI-TSA, April, 2013.
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exel
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exel2014-09-02 16:53:222014-09-02 16:53:25"A Novel Damage-Free High-k Etch Technique Using Neutral Beam Assisted Atomic Layer Etching (NBALE) for sub-32nm Technology Node Low Power Metal Gate/High-K Dielectric CMOSFETs", Proc. of Int. Elect. Dev. Meeting, 2009
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exel2014-09-02 16:49:052014-09-02 16:49:08"Device and Reliability Improvement of HfSiON+LaOx/Metal Gate Stacks for 22nm Node Application", Proc. of Int. Electron Device Meeting, p.45, 2008.
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exel
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exel2014-09-02 16:48:082014-09-02 16:48:12"A Comprehensive and Comparative Study of Interface and Bulk Characteristics of nMOSETs with La-Incorporated High-k Dielectrics", Proc. of Int. Electron Device Meeting, p.111, 2008.
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exel2014-09-02 16:47:232014-09-02 16:47:26“The Impact of La-Doping on the Reliability of Low Vth High-k/Metal Gate nMOSFETs Under Various Gate Stress Conditions", Proc. of Int. Electron Device Meeting, p.115, 2008.