“Performance enhancement on sub-70nm strained silic0on SOI MOSFETs on Ultra-thin Thermally Mixed Strained silicon/SiGe on Insulator(TM-SGOI) substrate with Raised S/D,” Tech Dig. of Int. Electron Device Meetings, p.946 , 2002. (Late news paper)

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“Gate Postdoping to Decouple Implant/Anneal for Gate, Source/Drain, and Extension:Maximizing Polysilicon Gate Activation for 0.1 µm CMOS Technologies,” Tech. Dig. of VLSI Symposium, 2002

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