“High Performance CMOS Devices on SOI for 90 nm Technology Enhanced by RSD (Raised Source/Drain) and Thermal Cycle/Spacer Engineering,” Tech. Dig. of Int. Electron Device Meetings, 2003

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“Gate Postdoping to Decouple Implant/Anneal for Gate, Source/Drain, and Extension:Maximizing Polysilicon Gate Activation for 0.1 µm CMOS Technologies,” Tech. Dig. of VLSI Symposium, 2002

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