• Login
  • Register
나노복합전자소자연구실
  • Professor
  • Members
    • Members
    • Visitors
    • Alumni
  • Research
    • Introduction
    • Projects
    • Highlight of research
    • Resources
  • Publications
    • Journals
    • Conferences
    • Patents/Book
  • Lecture
    • Future Device Technology & Intellectual Property Right
    • Introduction to semiconductor devices and processes
    • Advanced electrical characterization methods for nano scale devices
    • Device Physics for Nanoscale device
    • Advanced Device Analysis
    • Post CMOS Hybrid Device Technology
    • Link
  • Community
    • Notice
    • Freeboard
    • Lab board
    • Photo Gallery
  • Menu
블로그 - 최근 뉴스

“Method for measuring capacitance”, U.S. patentNo. 6828630, 2009.06.16

2014년 9월 3일/카테고리: Patents/Book /작성자: exel
태그: B.H.Lee, R.Choi, D. Heh, K. P. Cheung
https://gistexel.com/wp-content/uploads/2014/08/logo_exel.gif 0 0 exel https://gistexel.com/wp-content/uploads/2014/08/logo_exel.gif exel2014-09-03 14:35:222014-09-03 14:35:25“Method for measuring capacitance”, U.S. patentNo. 6828630, 2009.06.16
다음의 항목 또한 추천합니다.
“Forming gate oxide having multiple thickness,” U.S. patent No. 7,160,771, 2007.
“CMOS device on ultrathin SOI with a deposited raised source/drain, and a method of manufacture ,” US…
“Triple layer hard mask for gate patterning to fabricate scaled transistor,” US patent No.6800530, 2004
“ Integration of dual workfunction metal gate CMOS devices,” US patent No. 6653698, 2003.
"Apparatus and methods for wafer debonding using a liquid jet,” US patent No.5783022, 1998.
"Wafer polishing device,” US patent No.5735731, 1998.

Notice

제목 작성일
[KBS 시사기획 창] 인터뷰
2019.08.23
[전자신문] 팔만대장경과 반도체
2019.08.23
[2015-05-13] 보도자료
2015.05.13
[2015-03-28] 성과를 나누는 지식활동
2015.04.27
Homepage renewal (EXEL 멤버 필독)
2015.03.26

About us

EXEL LAB
Gwangju Institute of Science and Technology (GIST)
123, Cheomdangwagi-ro, Buk-gu, Gwangju, Korea [61005]
TEL: 82-62-715-2347
FAX: 82-62-970-2304

GIST Link

  • 미래전자소자연구센터
    http://ceeds.or.kr/
  • 광주과학기술원
    http://www.gist.ac.kr
  • 광주과학기술원 신소재공학부
    https://mse1.gist.ac.kr
  • 광주과학기술원 웹메일
    http://gist.ac.kr/
Copyright © 2010 Exploratory Hybrid Electronic Device Lab. All Rights Reserved.
“Forming gate oxide having multiple thickness,” U.S. patent No. 7,160,771,... “나노스위치,” 출원번호 10-2009-0040570, 2011.
Scroll to top