https://gistexel.com/wp-content/uploads/2014/08/logo_exel.gif00exelhttps://gistexel.com/wp-content/uploads/2014/08/logo_exel.gifexel2014-09-02 15:50:302014-09-02 15:50:34“Effects of Optimization of Gate Edge Profile on sub-45nm Metal Gate High-k Dielectric Metal-Oxide-Semiconductor Field Effect Transistors Characteristics”, Ext. Abs. of SSDM, p.1112, 2006.